1. Field of the Invention
The present invention relates to a complementary MOS integrated circuit device and, more particularly, to a complementary MOS integrated circuit device having an MOS transistor of one conductivity type formed on a semiconductor substrate and an MOS transistor of another conductivity type opposite to one conductivity type formed on the MOS transistor of one conductivity type through a separate layer.
2. Related Background Art
Hitherto, in a complementary MOS integrated circuit device, in general, on a silicon monocrystalline substrate (hereinafter, referred to as a silicon substrate) of the first conductivity type, a diffusion layer of the second conductivity type opposite to the first conductivity type of the silicon substrate is partially formed, an MOS transistor of the first conductivity type is formed on the diffusion layer of the second conductivity type, and an MOS transistor of the second conductivity type is formed on the silicon substrate of the first conductivity type.
An example of a constitution of such a conventional complementary MOS integrated circuit device will be explained. When an N-type silicon substrate is used, a first P-type diffusion layer called a P well is formed in the N-type silicon substrate and thereafter, a second P-type diffusion layer serving as drain/source of the P channel MOS transistor is formed in the N-type silicon substrate, and a first N-type diffusion layer serving as drain/source of an N channel MOS transistor is formed in the first P-type diffusion layer.
The foregoing complementary MOS integrated circuit device has a serious problem such that a latch-up occurs because a thyristor is constituted by a parasitic bipolar transistor which is formed due to the constitution of this device. In addition, this device has a problem such that the degree of integration is small since both of the P channel MOS transistor and the N channel MOS transistor are two-dimensionally laterally arranged. Various studies and improvements have been made to solve such problems. As one of them, there has been proposed a method whereby an N channel MOS transistor is formed on a P-type silicon substrate and thereafter, the N channel MOS transistor is covered by an insulative layer, a P channel MOS transistor is formed on a thin film formed on the insulative layer, and a complementary MOS integrated circuit of a multi-layer is formed. However, in the conventional thin film forming technique, in general, only a thin film of amorphous silicon or polysilicon can be grown on the insulative layer. Therefore, hitherto, there is used a method whereby a P channel MOS transistor is formed on a polysilicon thin film or a silicon thin film which has once grown is dissolved by a laser beam or the like so as to form a monocrystal.
However, the foregoing methods also have the following problems.
First, the method whereby the P channel MOS transistor is formed on the polysilicon thin film has a problem such that the channel mobility is remarkably smaller than that in the case where it is formed on a monocrystal. On the other hand, according to the method whereby the silicon thin film is dissolved to form a monocrystal, after an N channel MOS transistor was formed on the silicon substrate, the silicon thin film is dissolved. Thus, the temperature of the N channel MOS transistor rises and impurities are redistributed in the diffusion layer which has once been formed. Such a redistribution of the impurities which occurs after the N channel MOS transistor was formed causes the characteristic to remarkably deteriorate and becomes a serious problem in the fine MOS transistor which has recently been realized.